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SH7261 Datasheet(PDF) 363 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 363 Page - Renesas Technology Corp |
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363 / 1348 page  Section 11 Direct Memory Access Controller (DMAC) Rev. 2.00 Sep. 07, 2007 Page 331 of 1312 REJ09B0320-0200 STRG Bit Settings DMA Request Source 00: Rising Edge Sense 01: High Level Sense 10: Falling Edge Sense 11: Low Level Sense DCTG Bit Setting SSI 0ch × × √ × 011011 SSI 1ch × × √ × 011100 RCAN-ET 0ch × × √ × 011101 RCAN-ET 1ch × × √ × 011110 MTU2 0ch × × √ × 011111 MTU2 1ch × × √ × 100000 MTU2 2ch × × √ × 100001 MTU2 3ch × × √ × 100010 MTU2 4ch × × √ × 100011 ADC × × √ × 100100 ROM-DEC × × √ × 100101 [Legend] ×: Setting prohibited √: Can be set |
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