SH7261 datasheet(759/1348 Pages) RENESAS

759 / 1348 page

Section 16 Serial Communication Interface with FIFO (SCIF)

Rev. 2.00 Sep. 07, 2007 Page 727 of 1312

REJ09B0320-0200

16.6.3

Restriction on DMAC Usage

1. When the DMAC writes data to SCFTDR with a TXI interrupt request, the state of the TEND

flag becomes undefined. Therefore, the TEND flag should not be used as the transfer end flag

in such a case.

2. When one channel is used in full duplex communication with the DMAC used for transmission

and the CPU used for reception, if the receive data are read from the receive FIFO data register

(SCFRDR) after the RDF or DR flag in the serial status register (SCFSR) has been set, the

RDF or DR flag may be cleared.

3. When one channel is used in full duplex communication with the DMAC used for reception

and the CPU used for transmission, if the transmit data is written to the transmit FIFO data

set, the TDFE or TEND flags may be cleared.

16.6.4

Break Detection and Processing

Break signals can be detected by reading the RxD pin directly when a framing error (FER) is

detected. In the break state the input from the RxD pin consists of all 0s, so the FER flag is set and

the parity error flag (PER) may also be set.

Note that, although transfer of receive data to SCFRDR is halted in the break state, the SCIF

receiver continues to operate.

16.6.5

Sending a Break Signal

The I/O condition and level of the TxD pin are determined by the SPB2IO and SPB2DT bits in the

serial port register (SCSPTR). This feature can be used to send a break signal.

Until TE bit is set to 1 (enabling transmission) after initializing, the TxD pin does not work.

During the period, mark status is performed by the SPB2DT bit. Therefore, the SPB2IO and

SPB2DT bits should be set to 1 (high level output).

To send a break signal during serial transmission, clear the SPB2DT bit to 0 (designating low

level), then clear the TE bit to 0 (halting transmission). When the TE bit is cleared to 0, the

transmitter is initialized regardless of the current transmission state, and 0 is output from the TxD

pin.

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