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SH7261 Datasheet(PDF) 816 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 816 Page - Renesas Technology Corp |
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816 / 1348 page ![]() Section 18 Serial Sound Interface (SSI) Rev. 2.00 Sep. 07, 2007 Page 784 of 1312 REJ09B0320-0200 Bit Bit Name Initial Value R/W Description 24 DIRQ 0 R Data Interrupt Status Flag This status flag indicates that the module has data to be read or requires data to be written. In either case this bit is set to 1 regardless of the value of the DIEN bit to allow polling. The interrupt can be masked by clearing DIEN, but cannot be cleared by writing to this bit. If DIRQ= 1 and DIEN = 1, an interrupt occurs. • TRMD = 0 (Receive mode) 0: No unread data in SSIRDR 1: Unread data in SSIRDR • TRMD = 1 (Transmit mode) 0: Transmit buffer is full. 1: Transmit buffer is empty and requires data to be written to SSITDR. 23 to 4 Undefined R Reserved The read value is not guaranteed. The write value should always be 0. 3, 2 CHNO[1:0] 00 R Channel Number This value indicates the current channel number. • TRMD = 0 (Receive mode) CHNO indicates which channel the data in SSIRDR currently represents. This value will change as the data in SSIRDR is updated from the shift register. • TRMD = 1 (Transmit mode) CHNO indicates which channel is required to be written to SSITDR. This value will change as the data is copied to the shift register, regardless of whether the data is written to SSITDR. |
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