SH7261 datasheet(861/1348 Pages) RENESAS

861 / 1348 page

Section 19 Controller Area Network (RCAN-ET) [R5S72611] [R5S72613]

Rev. 2.00 Sep. 07, 2007 Page 829 of 1312

REJ09B0320-0200

19.4.2

General Status Register (GSR)

The General Status Register (GSR) is a 16-bit read-only register that indicates the status of

RCAN-ET.

• GSR (Address = H'002)

Bit:

Initial value:

R/W:

0000000000001100

RRRRRRRRRRRRRRRR

——————————

GSR5 GSR4 GSR3 GSR2 GSR1 GSR0

Bits 15 to 6: Reserved. The written value should always be '0' and the returned value is '0'.

Bit 5 — Error Passive Status Bit (GSR5): Indicates whether the CAN Interface is in Error

Passive or not. This bit will be set high as soon as the RCAN-ET enters the Error Passive state and

is cleared when the module enters again the Error Active state (this means the GSR5 will stay high

during Error Passive and during Bus Off). Consequently to find out the correct state both GSR5

and GSR0 must be considered.

Bit 5: GSR5

Description

RCAN-ET is not in Error Passive or in Bus Off status (Initial value)

[Reset condition] RCAN-ET is in Error Active state

RCAN-ET is in Error Passive (if GSR0 = 0) or Bus Off (if GSR0 = 1)

[Setting condition] When TEC

≥ 128 or REC ≥ 128 or if Error Passive Test

Mode is selected

SH7261 Datasheet(PDF) 861 Page - Renesas Technology Corp