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SH7672 Datasheet(PDF) 436 Page - Renesas Technology Corp |
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SH7672 Datasheet(HTML) 436 Page - Renesas Technology Corp |
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436 / 1292 page ![]() Section 12 Ethernet Controller (EtherC) Rev. 1.00 Nov. 14, 2007 Page 410 of 1262 REJ09B0437-0100 12.3.8 PHY Status Register (PSR) PSR is a read-only register that can read interface signals from the PHY. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Bit: Initial value: R/W: 15 14 13 12 11 10 9876543210 Bit: Initial value: R/W: 0000000000000000 RRRRRRRRRRRRRRRR 000000000000000 undefined RRRRRRRRRRRRRRRR ---------------- --------------- LMON Bit Bit Name Initial Value R/W Description 31 to 1 All 0 R Reserved These bits are always read as 0. The write value should always be 0. 0 LMON 0 R LNKSTA Pin Status The Link status can be read by connecting the Link signal output from the PHY to the LNKSTA pin. For the polarity, refer to the PHY specifications to be connected. |
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