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ADS1282IPW Datasheet(PDF) 6 Page - Texas Instruments |
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ADS1282IPW Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 52 page  DEVICE INFORMATION CLK SCLK DRDY DOUT DIN DGND MCLK M1 M0 SYNC MFLAG DGND CAPN CAPP BYPAS DGND DVDD DGND RESET PWDN VREFP VREFN AVSS AVDD AINN1 AINP1 AINN2 AINP2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 ADS1282 ADS1282 SBAS418E – SEPTEMBER 2007 – REVISED OCTOBER 2008 ........................................................................................................................................ www.ti.com TSSOP-28 Top View TERMINAL FUNCTIONS NAME NO. FUNCTION DESCRIPTION CLK 1 Digital input Master clock input SCLK 2 Digital input Serial clock input DRDY 3 Digital output Data ready output: read data on falling edge DOUT 4 Digital output Serial data output DIN 5 Digital input Serial data input Modulator clock output; if in modulator mode: MCLK 7 Digital I/O MCLK: Modulator clock output Otherwise, the pin is an unused input (must be tied). Modulator data output 1; if in modulator mode: M1 8 Digital I/O M1: Modulator data output 1 Otherwise, the pin is an unused input (must be tied). Modulator data output 0; if in modulator mode: M0 9 Digital I/O M0: Modulator data output 0 Otherwise, the pin is an unused input (must be tied). SYNC 10 Digital input Synchronize input MFLAG 11 Digital output Modulator Over-Range flag: 0 = normal, 1 = modulator over-range DGND 6, 12, 25, 27 Digital ground Digital ground, pin 12 is the key ground point CAPN 13 Analog PGA outputs: Connect 10nF capacitor from CAPP to CAPN CAPP 14 Analog PGA outputs: Connect 10nF capacitor from CAPP to CAPN AINP2 15 Analog input Positive analog input 2 AINN2 16 Analog input Negative analog input 2 AINP1 17 Analog input Positive analog input 1 AINN1 18 Analog input Negative analog input 1 AVDD 19 Analog supply Positive analog power supply AVSS 20 Analog supply Negative analog power supply VREFN 21 Analog input Negative reference input VREFP 22 Analog input Positive reference input PWDN 23 Digital input Power-down input, active low RESET 24 Digital input Reset input, active low DVDD 26 Digital supply Digital power supply: +1.8V to +3.3V BYPAS 28 Analog Sub-regulator output: Connect 1 µF capacitor to DGND 6 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): ADS1282 |
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