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ADS1282IPW Datasheet(PDF) 22 Page - Texas Instruments |
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ADS1282IPW Datasheet(HTML) 22 Page - Texas Instruments |
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22 / 52 page ![]() Minimum Phase Response HPF Stage HPF(Z)= 1 Z - -1 1 bZ - -1 2 a - 2 ´ (9) b= ( ) 1+(1 a) - 2 2 2 (10) 0 20 40 Frequency(Hz) 35 30 25 20 15 10 5 60 80 100 120 140 160 180 200 LinearPhaseFilter MinimumPhaseFilter HPF[1:0]=65,536 1 - cos +sin 1 w - N N w cos w N 1 2 - ADS1282 SBAS418E – SEPTEMBER 2007 – REVISED OCTOBER 2008 ........................................................................................................................................ www.ti.com The minimum phase filter provides a short delay from The last stage of the ADS1282 filter block is a the arrival of an input signal to the output, but the first-order HPF implemented as an IIR structure. This relationship (phase) is not constant versus frequency, filter stage blocks dc signals and rolls off as shown in Figure 49. The filter phase is selected by low-frequency components below the cut-off the PHS bit, as Table 7 shows. frequency. The transfer function for the filter is shown in Equation 9: where b is calculated as shown in Equation 10: The high-pass corner frequency is programmed by registers HPF[1:0], in hexadecimal. Equation 11 is used to set the high-pass corner frequency. Table 8 lists example values for the high-pass filter. Figure 49. FIR Group Delay (fDATA = 500Hz) (11) Where: Table 7. FIR Phase Selection HPF = High-pass filter register value (converted to hexadecimal) PHS BIT FILTER PHASE ω N = 2 πf HP/fDATA (normalized frequency, 0 Linear radians) 1 Minimum fHP = High-pass corner frequency (Hz) fDATA = Data rate (Hz) Table 8. High-Pass Filter Value Examples fHP (Hz) DATA RATE (SPS) HPF[1:0] 0.5 250 0337h 1.0 500 0337h 1.0 1000 019Ah 22 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): ADS1282 |
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