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ADS1282IPW Datasheet(PDF) 30 Page - Texas Instruments

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Part # ADS1282IPW
Description  High-Resolution Analog-to-Digital Converter
PDF  52 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

ADS1282IPW Datasheet(HTML) 30 Page - Texas Instruments

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OFC[2:0] Registers
FSC[2:0] Registers
ADS1282
SBAS418E – SEPTEMBER 2007 – REVISED OCTOBER 2008 ........................................................................................................................................ www.ti.com
The offset calibration is a 24-bit word, composed of
The full-scale calibration is a 24-bit word, composed
three 8-bit registers, as shown in Table 17. The offset
of three 8-bit registers, as shown in Table 18. The
register is left-justified to align with the 32-bits of
full-scale calibration value is 24-bit, straight offset
conversion data. The offset is in twos complement
binary, normalized to 1.0 at code 400000h. Table 16
format with a maximum positive value of 7FFFFFh
summarizes the scaling of the full-scale register. A
and a maximum negative value of 800000h. This
register value of 400000h (default value) has no gain
value is subtracted from the conversion data. A
correction (gain = 1). Note that while the full-scale
register value of 00000h has no offset correction
calibration register value corrects gain errors above 1
(default value). Note that while the offset calibration
(gain correction < 1), the full-scale range of the
register value can correct offsets ranging from –FS to
analog inputs should not exceed 103% to avoid input
+FS (as shown in Table 15), to avoid input overload,
overload.
the analog inputs cannot exceed the full-scale range.
Table 16. Full-Scale Calibration Register Values
Table 15. Offset Calibration Values
FSC REGISTER
GAIN CORRECTION
OFC REGISTER
FINAL OUTPUT CODE(1)
800000h
2.0
7FFFFFh
80000000h
400000h
1.0
000001h
FFFFFF00h
200000h
0.5
000000h
00000000h
000000h
0
FFFFFFh
00000100h
800000h
7FFFFF00h
(1) Full 32-bit final output code with zero code input.
Table 17. Offset Calibration Word
REGISTER
BYTE
BIT ORDER
OFC0
LSB
B7
B6
B5
B4
B3
B2
B1
B0 (LSB)
OFC1
MID
B15
B14
B13
B12
B11
B10
B9
B8
OFC2
MSB
B23 (MSB)
B22
B21
B20
B19
B18
B17
B16
Table 18. Full-Scale Calibration Word
REGISTER
BYTE
BIT ORDER
FSC0
LSB
B7
B6
B5
B4
B3
B2
B1
B0 (LSB)
FSC1
MID
B15
B14
B13
B12
B11
B10
B9
B8
FSC2
MSB
B23 (MSB)
B22
B21
B20
B19
B18
B17
B16
30
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Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): ADS1282



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