ADS1282IPW datasheet(16/52 Pages) TI

16 / 52 page

ADC

MODULATOR

Frequency(Hz)

-20

-40

-60

-80

-100

-180

100

100k

10k

-120

-140

-160

1HzResolution

=20mV

2nd-Order

2nd-Stage

2nd-Order

1st-Stage

AnalogInput(V )

4th-OrderModulator

MCLK

CLK/4

MODULATOR OVER-RANGE

Y[n]=3M0[n

6M0[n

3]+4M0[n

+9(M1[n]

2M1[n

1]+M1[n

2])

(5)

ADS1282

SBAS418E – SEPTEMBER 2007 – REVISED OCTOBER 2008 ........................................................................................................................................ www.ti.com

passband. The noise moves out of the passband and

appears at the chopping frequency (fCLK/512 = 8kHz).

The ADC block of the ADS1282 is composed of two

The component at 5.8kHz is the tone frequency,

sections:

high-accuracy

modulator

and

shifted out of band by an external 20mV/PGA offset.

programmable digital filter.

The frequency of the tone is proportional to the

applied dc input and is given by PGA × VIN/0.003 (in

kHz).

The

high-performance

modulator

inherently-stable, fourth-order,

ΔΣ, 2 + 2 pipelined

structure,

Figure

shows.

shifts

the

quantization noise to a higher frequency (out of the

passband) where digital filtering can easily remove it.

The modulator can be filtered either by the on-chip

digital filter or by use of post-processing filters.

Figure 37. Modulator Output Spectrum

Figure 36. Fourth-Order Modulator

The ADS1282 modulator is inherently stable, and

therefore, has predictable recovery behavior resulting

The modulator first stage converts the analog input

from an input overdrive condition. The modulator

voltage into a pulse-code modulated (PCM) stream.

does not exhibit self-resetting behavior, which often

When the level of differential analog input (AINP –

results in an unstable output data stream.

AINN) is near one-half the level of the reference

The ADS1282 modulator outputs a 1s density data

voltage 1/2 × (VREFP – VREFN), the ‘1’ density of

stream at 90% duty cycle with the positive full-scale

the PCM data stream is at its highest. When the level

input signal applied (10% duty cycle with the negative

of the differential analog input is near zero, the PCM

full-scale signal). If the input is overdriven past 90%

‘0’ and ‘1’ densities are nearly equal. At the two

modulation, but below 100% modulation (10% and

extremes of the analog input levels (+FS and –FS),

for

negative

overdrive,

respectively),

the

the ‘1’ density of the PCM streams is approximately

modulator remains stable and continues to output the

+90% and +10%, respectively.

1s density data stream. The digital filter may or may

The modulator second stage produces a '1' density

not clip the output codes to +FS or –FS, depending

data stream designed to cancel the quantization

on the duration of the overdrive. When the input

noise of the first stage. The data streams of the two

returns to the normal range from a long duration

stages are then combined before the digital filter

overdrive

(worst

case),

the

modulator

returns

stage, as shown in Equation 5.

immediately to the normal range, but the group delay

of the digital filter delays the return of the conversion

result to within the linear range (31 readings for linear

phase FIR). 31 additional readings (62 total) are

M0[n] represents the most recent first-stage output

required for completely settled data.

while M0[n – 1] is the previous first-stage output.

If the inputs are sufficiently overdriven to drive the

When the modulator output is enabled, the digital

modulator to full duty cycle (that is, all 1s, all 0s, or

filter shuts down to save power.

±110%FSR), the modulator enters a stable saturated

The modulator is optimized for input signals within a

state. The digital output code may clip to +FS or –FS,

4kHz passband. As Figure 37 shows, the noise

again depending on the duration. A small duration

shaping of the modulator results in a sharp increase

overdrive may not always clip the output code. When

in noise above 6kHz. The modulator has a chopped

input structure that further reduces noise within the

Submit Documentation Feedback

Product Folder Link(s): ADS1282

ADS1282IPW Datasheet(PDF) 16 Page - Texas Instruments

ADS1282IPW Datasheet(HTML) 16 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

Datasheet Download

Link URL