38K2 datasheet(211/358 Pages) RENESAS

211 / 358 page

2.4 Serial I/O

Rev.2.00

Oct 15, 2006

page 62 of 112

38K2 Group

REJ09B0338-0200

APPLICATION

Fig. 2.4.31 Registers setting related to transmitting side

Serial I/O status register (Address : 2716)

SIOSTS

Transmitting side

Baud rate generator (Address : 0FE216)

BRG

SIOCON

10 0 1

0 0

UART control register (Address : 0FE116)

UARTCON

f(XIN)

Transfer bit rate ✕ 16 ✕ m

–1

Serial I/O control register (Address : 0FE016)

Set

When bit 0 of the Serial I/O control register (Address : 0FE016) is set to “0,”

a value of m is 1.

When bit 0 of the Serial I/O control register (Address : 0FE016) is set to “1,”

a value of m is 4.

✽

BRG count source selection bit : f(XIN)

Serial I/O synchronous clock selection bit : BRG/16

Transmit enable bit : Transmit enabled

Receive enable bit : Receive disabled

Serial I/O mode selection bit : Asynchronous serial I/O(UART)

Serial I/O enable bit : Serial I/O enabled

SRDY

output enable bit :SRDY out disabled

Character length selection bit : 8 bits

Parity enable bit : Parity checking disabled

Stop bit length selection bit : 2 stop bits

Transmit buffer empty flag

• Confirm that the data has been transferred from Transmit buffer

• When this flag is “1”, it is possible to write the next transmission

data in to Transmit buffer register.

Transmit shift register shift completion flag

Confirm completion of transmitting 1-byte data with this flag.

“1” : Transmit shift completed

38K2 Datasheet(PDF) 211 Page - Renesas Technology Corp

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