38K2 datasheet(213/358 Pages) RENESAS

213 / 358 page

2.4 Serial I/O

Rev.2.00

Oct 15, 2006

page 64 of 112

38K2 Group

REJ09B0338-0200

APPLICATION

Figure 2.4.33 shows a control procedure of the transmitting side, and Figure 2.4.34 shows a control

procedure of the receiving side.

Fig. 2.4.33 Control procedure of transmitting side

SIOSTS (Address : 2716), bit0?

RESET

• Communication completion

P2 (Address : 0416), bit4

← 1

Pass 10 ms?

TB/RB (Address : 2616)

The second byte of

a transmission data

SIOSTS (Address : 2716), bit2?

Initialization

SIOCON

(Address : 0FE016)

←1001x0002

UARTCON (Address : 0FE116)

← 000010002

BRG

(Address : 0FE216)

← 39–1

(Address : 0416), bit4

← 0

P2D

(Address : 0516)

← xxx1xxxx2

TB/RB (Address : 2616)

The first byte of a

transmission data

P2 (Address : 0416), bit4

← 0

• Port P24 set for communication control

• An interval of 10 ms generated by Timer

• Communication start

• Transmission data write

Transmit buffer empty flag is set to “0”

by this writing.

• Transmission data write

Transmit buffer empty flag is set to “0”

by this writing.

• Judgment of transferring data from Transmit

buffer register to Transmit shift register

(Transmit buffer empty flag)

• Judgment of transferring data from Transmit

buffer register to Transmit shift register

(Transmit buffer empty flag)

• Judgment of shift completion of Transmit shift register

(Transmit shift register shift completion flag)

SIOSTS (Address : 2716), bit0?

q x: This bit is not used here. Set it to “0” or “1” arbitrarily.

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