38K2 datasheet(214/358 Pages) RENESAS

214 / 358 page

2.4 Serial I/O

Rev.2.00

Oct 15, 2006

page 65 of 112

38K2 Group

REJ09B0338-0200

APPLICATION

Fig. 2.4.34 Control procedure of receiving side

RESET

• Judgment of completion of receiving

(Receive buffer full flag)

SIOSTS (Address : 2716), bit1?

Read out a reception data

from RB (Address : 2616)

SIOSTS (Address : 2716), bit6?

Initialization

SIOCON

(Address : 0FE016)

← 1010x0002

UARTCON (Address : 0FE116)

← 000010002

BRG

(Address : 0FE216)

← 39–1

P2D

(Address : 0516)

← xxx0xxxx2

SIOSTS (Address : 2716), bit1?

• Judgment of an error flag

SIOSTS (Address : 2716), bit6?

P2 (Address : 0416), bit4?

Processing for error

Read out a reception data

from RB (Address : 2616)

• Reception of the first byte data

Receive buffer full flag is set

to “0” by reading data.

• Judgment of completion of

receiving

(Receive buffer full flag)

• Reception of the second byte data

Receive buffer full flag is set

to “0” by reading data.

• Judgment of an error flag

q x: This bit is not used here. Set it to “0” or “1” arbitrarily.

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