38K2 datasheet(291/358 Pages) RENESAS

291 / 358 page

3.2 Notes on use

Rev.2.00

Oct 15, 2006

page 30 of 99

38K2 Group

REJ09B0338-0200

APPENDIX

(3)

Decimal calculations

➀ Execution of decimal calculations

The ADC and SBC are the only instructions which will yield proper decimal notation, set the

decimal mode flag (D) to “1” with the SED instruction. After executing the ADC or SBC instruction,

execute another instruction before executing the SEC, CLC, or CLD instruction.

➁ Notes on status flag in decimal mode

When decimal mode is selected, the values of three of the flags in the status register (the N, V,

and Z flags) are invalid after a ADC or SBC instruction is executed.

The carry flag (C) is set to “1” if a carry is generated as a result of the calculation, or is cleared

to “0” if a borrow is generated. To determine whether a calculation has generated a carry, the C

flag must be initialized to “0” before each calculation. To check for a borrow, the C flag must be

initialized to “1” before each calculation.

(4)

JMP instruction

When using the JMP instruction in indirect addressing mode, do not specify the last address on a page

as an indirect address.

(5)

Multiplication and Division Instructions

• The index X mode (T) and the decimal mode (D) flags do not affect the MUL and DIV instruction.

• The execution of these instructions does not change the contents of the processor status register.

(6)

Ports

The contents of the port direction registers cannot be read. The following cannot be used:

• The data transfer instruction (LDA, etc.)

• The operation instruction when the index X mode flag (T) is “1”

• The addressing mode which uses the value of a direction register as an index

• The bit-test instruction (BBC or BBS, etc.) to a direction register

• The read-modify-write instructions (ROR, CLB, or SEB, etc.) to a direction register.

Use instructions such as LDM and STA, etc., to set the port direction registers.

(7)

Instruction Execution Time

The instruction execution time is obtained by multiplying the frequency of the internal clock

f by the number

of cycles needed to execute an instruction.

The number of cycles required to execute an instruction is shown in the list of machine instructions.

The frequency of the internal clock

f is half of the XIN frequency in high-speed mode.

Set D flag to “1”

↓

ADC or SBC instruction

↓

NOP instruction

↓

SEC, CLC, or CLD instruction

Fig. 3.2.7 Status flag at decimal calculations

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