38K2 datasheet(287/358 Pages) RENESAS

287 / 358 page

3.2 Notes on use

Rev.2.00

Oct 15, 2006

page 26 of 99

38K2 Group

REJ09B0338-0200

APPENDIX

(5)

Data transmission control with referring to transmit shift register completion flag (Serial I/O)

The transmit shift register completion flag changes from “1” to “0” with a delay of 0.5 to 1.5 shift

clocks. When data transmission is controlled with referring to the flag after writing the data to the

transmit buffer register, note the delay.

(6)

Transmission control when external clock is selected (Serial I/O)

When an external clock is used as the synchronous clock for data transmission, set the transmit

enable bit to “1” at “H” of the SCLK input level. Also, write the transmit data to the transmit buffer

(7)

Transmit interrupt request when transmit enable bit is set (Serial I/O)

When the transmit interrupt is used, set the transmit interrupt enable bit to transmit enabled as shown

in the following sequence.

➀ Set the interrupt enable bit to “0” (disabled) with CLB instruction.

➁ Prepare serial I/O for transmission/reception.

➂ Set the interrupt request bit to “0” with CLB instruction after 1 or more instruction has been

executed.

➃ Set the interrupt enable bit to “1” (enabled).

q Reason

When the transmission enable bit is set to “1”, the transmit buffer empty flag and transmit shift

interrupt bit is set regardless of which of the two timings listed below is selected as the timing for

the transmission interrupt to be generated.

• Transmit buffer empty flag is set to “1”

• Transmit shift register completion flag is set to “1”

3.2.6 Notes on USB function

(1)

Port pins (D0+, D0-, D1+, D1-, D2+, D2-) treatment

•The USB specification requires a driver-impedance 28 to 44

Ω. In order to meet the USB specification

impedance requirements, connect a resistor (27 W recommended) in series to the USB port pins.

In addition, in order to reduce the ringing and control the falling/rising timing and a crossover point,

connect a capacitor between the USB port pins and the Vss pin if necessary.

The values and structure of those peripheral elements depend on the impedance characteristics

and the layout of the printed circuit board. Accordingly, evaluate your system and observe waveforms

before actual use and decide use of elements and the values of resistors and capacitors.

•Make sure the USB D+/D- lines do not cross any other wires. Keep a large GND area to protect the

USB lines. Also, make sure you use a USB specification compliant connecter for the connection.

(2)

USBVREF pin treatment (Noise Elimination)

•Connect a capacitor between the USBVREF pin and the Vss pin. The capacitor should have a 2.2

µF

capacitor (electrolytic capacitor) and a 0.1

µF capacitor (ceramic type capacitor) connected in parallel.

•In Vcc = 3.0 to 3.6 V operation, connect the USBVREF pin directly to the Vcc pin in order to supply

power to the USB port circuit. In addition, you will need to disable the built-in USB reference voltage

circuit in this operation (set bit 4 of the USB control register to “0”.) If you are using the bus powered

supply in this condition, the DC-DC converter must be placed outside the MCU.

•In Vcc = 4.00 to 5.25 V operation, do not connect the external DC-DC converter to the USBVREF pin.

Use the built-in USB reference voltage circuit.

(3)

USB Communication

•In applications requiring high-reliability, we recommend providing the system with protective measures

such as USB function initialization by software or USB reset by the host to prevent USB communication

from being terminated unexpectedly, for example due to external causes such as noise.

38K2 Datasheet(PDF) 287 Page - Renesas Technology Corp

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