H83065 datasheet(148/963 Pages) RENESAS

148 / 963 page

Section 6 Bus Controller

Rev. 4.00 Jan 26, 2006 page 126 of 938

REJ09B0276-0400

WCRH and WCRL are initialized to H'FF by a reset and in hardware standby mode. They are not

initialized in software standby mode.

WCRH

W51

W50

W41

W40

Initial value

Read/Write

R/W

76543210

W71

W70

W61

W60

Bit

Bits 7 and 6—Area 7 Wait Control 1 and 0 (W71, W70): These bits select the number of

program wait states when area 7 in external space is accessed while the AST7 bit in ASTCR is set

to 1.

Bit 7

W71

Bit 6

W70

Description

Program wait not inserted when external space area 7 is accessed

1 program wait state inserted when external space area 7 is accessed

2 program wait states inserted when external space area 7 is accessed

3 program wait states inserted when external space area 7 is accessed

(Initial value)

Bits 5 and 4—Area 6 Wait Control 1 and 0 (W61, W60): These bits select the number of

program wait states when area 6 in external space is accessed while the AST6 bit in ASTCR is set

to 1.

Bit 5

W61

Bit 4

W60

Description

Program wait not inserted when external space area 6 is accessed

1 program wait state inserted when external space area 6 is accessed

2 program wait states inserted when external space area 6 is accessed

3 program wait states inserted when external space area 6 is accessed

(Initial value)

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