SH7014 datasheet(351/754 Pages) RENESAS

351 / 754 page

12. Serial Communication Interface (SCI)

Rev.5.00 Sep. 27, 2007 Page 317 of 716

REJ09B0398-0500

Bit 6

⎯Receive Data Register Full (RDRF): Indicates that RDR contains received data.

Bit 6

RDRF

Description

RDR does not contain valid received data

(initial value)

[Clearing conditions]

• Power-on reset or standby mode

• When 0 is written to RDRF after reading RDRF = 1

• When DMAC reads data from RDR

RDR contains valid received data

[Setting condition]

When serial reception ends normally and receive data is transferred from RSR to

RDR

Note:

The RDR and RDRF are not affected by detection of receive errors or by clearing of the RE

bit to 0 in the serial control register. They retain their previous contents. If RDRF is still set

to 1 when reception of the next data ends, an overrun error (ORER) occurs and the

received data is lost.

Bit 5

⎯Overrun Error (ORER): Indicates that data reception ended abnormally due to an

overrun error.

Bit 5

ORER

Description

Receiving is in progress or has ended normally*

(initial value)

[Clearing conditions]

• Power-on reset or standby mode

• When 0 is written to ORER after reading ORER = 1

A receive overrun error occurred

[Setting condition]

When the next serial reception is completed while RDRF = 1*

Notes: 1. The ORER flag is not affected and retains their previous values when the RE bit in SCR

is cleared to 0.

2. RDR continues to hold the data received before the overrun error, so subsequent

receive data is lost. Serial receiving cannot continue while ORER is set to 1. In the

clock synchronous mode, serial transmitting is disabled.

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