SH7014 datasheet(349/754 Pages) RENESAS

349 / 754 page

12. Serial Communication Interface (SCI)

Rev.5.00 Sep. 27, 2007 Page 315 of 716

REJ09B0398-0500

Bit 2

⎯Transmit-End Interrupt Enable (TEIE): Enables or disables the transmit-end interrupt

(TEI) requested if TDR does not contain valid transmit data when the MSB is transmitted.

Bit 2

TEIE

Description

Transmit-end interrupt (TEI) requests are disabled*

(initial value)

Transmit-end interrupt (TEI) requests are enabled.*

Note:

The TEI request can be cleared by reading the TDRE bit in the serial status register

(SSR) after it has been set to 1, then clearing TDRE to 0 and clearing the transmit end

(TEND) bit to 0; or by clearing the TEIE bit to 0.

Bits 1 and 0

⎯Clock Enable 1 and 0 (CKE1 and CKE0): These bits select the SCI clock source

and enable or disable clock output from the SCK pin. Depending on the combination of CKE1 and

CKE0, the SCK pin can be used for serial clock output, or serial clock input. Select the SCK pin

function by using the pin function controller (PFC).

The CKE0 setting is valid only in the asynchronous mode, and only when the SCI is internally

clocked (CKE1 = 0). The CKE0 setting is ignored in the clock synchronous mode, or when an

external clock source is selected (CKE1 = 1). Select the SCI operating mode in the serial mode

source, see table 12.9 in section 12.3, Operation.

Bit 1

CKE1

Bit 0

CKE0 Description*

Asynchronous mode

Internal clock, SCK pin used for input pin (input signal is

ignored) or output pin (output level is undefined) *

Clock synchronous mode Internal clock, SCK pin used for synchronous clock

output*

Asynchronous mode

Internal clock, SCK pin used for clock output*

Clock synchronous mode Internal clock, SCK pin used for synchronous clock output

Asynchronous mode

External clock, SCK pin used for clock input*

Clock synchronous mode External clock, SCK pin used for synchronous clock input

Asynchronous mode

External clock, SCK pin used for clock input*

Clock synchronous mode External clock, SCK pin used for synchronous clock input

Notes: 1. The SCK pin is multiplexed with other functions. Use the pin function controller (PFC) to

select the SCK function for this pin, as well as the I/O direction.

2. Initial value.

3. The output clock frequency is the same as the bit rate.

4. The input clock frequency is 16 times the bit rate.

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