SH7014 datasheet(428/754 Pages) RENESAS

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13. High Speed A/D Converter

⎯ SH7014 ⎯

Rev.5.00 Sep. 27, 2007 Page 394 of 716

REJ09B0398-0500

13.6

Usage Notes

Note the following points concerning the high speed A/D converter.

13.6.1

Analog Input Voltage Range

During A/D conversions, see that the voltage applied to the analog input pins AN0 to AN7 is

within the range of AV

SS ≤ AN0 to AN7 ≤ AVCC.

13.6.2

CC, AVSS Input Voltages

The AV

CC, AVSS input voltages should be AVCC = VCC ±10%, and AVSS = VSS. When not using the

high speed A/D converter, make AV

CC = VCC and AVSS = VSS. When in standby mode, make VRAM ≤

CC ≤ 5.5 V, and AVSS = VSS. VRAM is the RAM standby voltage.

13.6.3

Input Ports

Make the time constant of circuitry connected to an input port shorter than the high speed A/D

converter sampling time. If the time constant of the circuit is longer, there will be occasions where

the input voltage is not adequately sampled.

13.6.4

Conversion Start Modes

Current consumption will be different for the A/D conversion operation in high speed start mode

and low-power conversion mode according to the PWR bit setting.

13.6.5

A/D Conversion Termination (HD6417014R only)

If conversion is terminated while in progress (when ADST = 1) in high-speed start mode (PWR =

1) by clearing the ADST bit, there may be a large degree of error in the first conversion following

the restart (on channel 1 in normal mode, or channel 2 in simultaneous sampling mode).

Subsequent conversions will be performed normally

If A/D conversion is terminated while in progress, use one of the following methods to solve this

problem:

(a) Ignore the first data following a restart after termination.

(b) If the first data after a restart is used, perform a single dummy conversion in single mode after

the termination, terminate A/D conversion, then restart.

after the restart will begin after the elapse of 200 A/D reference clock cycles.)

SH7014 Datasheet(PDF) 428 Page - Renesas Technology Corp