SH7014 datasheet(560/754 Pages) RENESAS

560 / 754 page

18. 128 kB Flash Memory (F-ZTAT)

Rev.5.00 Sep. 27, 2007 Page 526 of 716

REJ09B0398-0500

18.8.3

Error Protection

In error protection, an error is detected when SH7017 runaway occurs during flash memory

programming/erasing, or operation is not performed in accordance with the program/erase

algorithm, and the program/erase operation is aborted. Aborting the program/erase operation

prevents damage to the flash memory due to overprogramming or overerasing.

If the SH7017 malfunctions during flash memory programming/erasing, the FLER bit is set to 1 in

FLMCR2 and the error protection state is entered. The FLMCR1 and EBR1 settings are retained,

but program mode or erase mode is aborted at the point at which the error occurred. Program

mode or erase mode cannot be re-entered by re-setting the P or E bit. However, PV and EV bit

setting is enabled, and a transition can be made to verify mode.

FLER bit setting conditions are as follows:

1. When flash memory is read during programming/erasing (including a vector read or instruction

fetch)

2. Immediately after exception handling (excluding a reset) during programming/erasing

3. When a SLEEP instruction (including software standby) is executed during

programming/erasing

4. When the bus is released during programming/erasing

Error protection is released only by a power-on reset and in hardware standby mode.

Figure 18.15 shows the flash memory state transition diagram.

SH7014 Datasheet(PDF) 560 Page - Renesas Technology Corp