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SH7014 Datasheet(PDF) 653 Page - Renesas Technology Corp |
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SH7014 Datasheet(HTML) 653 Page - Renesas Technology Corp |
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653 / 754 page ![]() Appendix A On-Chip Supporting Module Registers Rev.5.00 Sep. 27, 2007 Page 619 of 716 REJ09B0398-0500 DMAC Bit Name Value Description 0 DMATCR—specified transfer count not ended (initial value) Clear condition: 0 write after TE = 1 read, Power-on reset, standby mode 1 Transfer End Flag (TE) 1 DMATCR specified number of transfers completed 0 Operation of the corresponding channel disabled (initial value) 0 DMAC Enable (DE) 1 Operation of the corresponding channel enabled DMAC Operation Register (DMAOR) H'FFFF86B0 8/16/32 Bit Item 15 14 13 12 11 10 9 8 Bit name ― ― ― ― ― ― ― ― Initial value 0 0 0 0 0 0 0 0 R/W R R R R R R R R Item 7 6 5 4 3 2 1 0 Bit name ― ― ― ― ― AE NMIF DME Initial value 0 0 0 0 0 0 0 0 R/W R R R R R R/(W) R/(W)* R/W* Note: * 0 write only is valid after 1 is read. Bit Name Value Description 0 No address error, DMA transfer enabled (initial value) Clearing condition: Write AE = 0 after reading AE = 1 2 Address Error Flag (AE) 1 Address error, DMA transfer disabled Setting condition: Address error due to DMAC 0 No NMI interrupt, DMA transfer enabled (initial value) Clearing condition: Write NMIF = 0 after reading NMIF = 1 1 NMI Flag (NMIF) 1 NMI has occurred, DMC transfer prohibited Set condition: NMI interrupt occurrence 0 Disable operation on all channels (initial value) 0 DMAC Master Enable (DME) 1 Enable operation on all channels |
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