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SH7014 Datasheet(PDF) 656 Page - Renesas Technology Corp |
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SH7014 Datasheet(HTML) 656 Page - Renesas Technology Corp |
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656 / 754 page ![]() Appendix A On-Chip Supporting Module Registers Rev.5.00 Sep. 27, 2007 Page 622 of 716 REJ09B0398-0500 MTU Timer I/O Control Register 0H (TIOR0H) H'FFFF8262 8/16/32 Bit Item 7 6 5 4 3 2 1 0 Bit name IOB3 IOB2 IOB1 IOB0 IOA3 IOA2 IOA1 IOA0 Initial value 0 0 0 0 0 0 0 0 R/W R/W R/W R/W R/W R/W R/W R/W R/W Bit Name Value Description 0 Output disabled (initial value) 0 1 Output 0 on compare-match 0 Output 1 on compare-match 0 1 1 Initial output is 0 Toggle output on compare- match 0 Output disabled 0 1 Output 0 on compare-match 0 Output 1 on compare-match 0 1 1 1 TGR0B is an output compare register Initial output is 1 Toggle output on compare- match 0 Input capture on rising edge 0 1 Input capture on falling edge 0 0 1 1 Capture input source is the TIOC0B pin Input capture on both edges 0 0 1 0 7 to 4 I/O Control B3 to B0 (IOB3 to IOB0) 1 1 1 1 TGR0B is an input capture register Capture input source is channel 1/ count clock Input capture on TCNT1 count up/count down |
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