SH7014 datasheet(674/754 Pages) RENESAS

674 / 754 page

Appendix A On-Chip Supporting Module Registers

Rev.5.00 Sep. 27, 2007 Page 640 of 716

REJ09B0398-0500

MTU

Timer Interrupt Enable Register 2 (TIER2)

H'FFFF82A4

8/16/32

Bit

Item

Bit name

TTGE

―

TCIEU

TCIEV

―

TGIEB

TGIEA

Initial value

R/W

Bit

Name

Value

Description

Disable A/D conversion start requests

(initial value)

A/D Conversion Start Request

Enable (TTGE)

Enable A/D conversion start request generation

Disable UDF interrupt requests (TCIU)

(initial value)

Underflow Interrupt Enable

(TCIEU)

Enable UDF interrupt requests (TCIU)

Disable TCFV interrupt requests (TCIV)

(initial value)

Overflow Interrupt Enable

(TCIEV)

Enable TCFV interrupt requests (TCIV)

Disable interrupt requests (TGIB) due to the TGFB bit

(initial value)

TGR Interrupt Enable B (TGIEB)

Enable interrupt requests (TGIB) due to the TGFB bit

Disable interrupt requests (TGIA) due to the TGFA bit

(initial value)

TGR Interrupt Enable A (TGIEA)

Enable interrupt requests (TGIA) due to the TGFA bit

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