SH7014 datasheet(675/754 Pages) RENESAS

675 / 754 page

Appendix A On-Chip Supporting Module Registers

Rev.5.00 Sep. 27, 2007 Page 641 of 716

REJ09B0398-0500

MTU

Timer Status Register 2 (TSR2)

H'FFFF82A5

8/16/32

Bit

Item

Bit name

TCFD

―

TCFU

TCFV

―

TGFB

TGFA

Initial value

R/W

R/(W)*

Note:

Only 0 writes to clear the flags are possible.

Bit

Name

Value

Description

TCNT counts down

Count Direction Flag (TCFD)

TCNT counts up

(initial value)

Clear condition: With TCFU = 1, a 0 write to TCFU

after reading it

(initial value)

Underflow Flag (TCFU)

Set condition: When the TCNT value underflows

(H'0000

→ H'FFFF)

Clear condition: With TCFV = 1, a 0 write to TCFV

after reading it

(initial value)

Overflow Flag (TCFV)

Set condition: When the TCNT value overflows

(H'FFFF

→ H'0000)

Clear condition: With TGFB = 1, a 0 write to TGFB

following a read

(initial value)

Input Capture/Output Compare

Flag B (TGFB)

Set conditions:

•

When TGRB is functioning as an output compare

•

When TGRB is functioning as input capture (the

TCNT value is sent to TGRB by the input capture

signal)

Clear condition: With TGFA = 1, a 0 write to TGFA

following a read*

(initial value)

Input Capture/Output Compare

Flag A (TGFA)

Set conditions:

•

When TGRA is functioning as an output compare

•

When TGRA is functioning as input capture (the

TCNT value is sent to TGRA by the input capture

signal)

Note:

Cleared by DMAC transfer due to TGFA.

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