SH7014 datasheet(235/754 Pages) RENESAS

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10. Multifunction Timer Pulse Unit (MTU)

Rev.5.00 Sep. 27, 2007 Page 201 of 716

REJ09B0398-0500

Bits 4 and 3

⎯Clock Edge 1, 0 (CKEG1 and CKEG0): CKEG1 and CKEG0 select the input

clock edges. When counting is done on both edges of the internal clock the input clock frequency

becomes 1/2 (Example: both edges of

φ/4 = rising edge of φ/2). When phase count mode is used

with channels 1, 2, these settings are ignored, as the phase count mode settings have priority.

Bit 4

CKEG1

Bit 3

CKEG0 Description

Count on rising edges

(initial value)

Count on falling edges

Count on both rising and falling edges

Notes: 1. X: 0 or 1, don't care.

2. Internal clock edge selection is effective when the input clock is

φ/4 or slower. These

settings are ignored when

φ/1, or the overflow/underflow of another channel is selected

for the input clock.

Bits 2 to 0

⎯Timer Prescaler 2 to 0 (TPSC2 to TPSC0): TPSC2 to TPSC0 select the counter

clock source for the TCNT. An independent clock source can be selected for each channel. Table

10.4 shows the possible settings for each channel.

Table 10.4

MTU Clock Sources

Internal Clock

External Clock

Channel

φ/1

φ/4

φ/

256

φ/

1024

Other Channel

Overflow/

Underflow

TCL

Note:

Symbols:

O: Setting possible

X: Setting impossible

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