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7641 Datasheet(PDF) 153 Page - Renesas Technology Corp |
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7641 Datasheet(HTML) 153 Page - Renesas Technology Corp |
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153 / 385 page  Rev.2.00 Aug 28, 2006 page 22 of 148 7641 Group REJ09B0336-0200 APPLICATION 2.2 Timer Fig. 2.2.13 Related registers setting ICONB T19F16 T2 6316 b0 b7 b0 b7 b0 b7 CPMA b0 b7 01 11 T123M b0 b7 01 0 0 0 1 1 0 CPU mode register A (address 0016) Processor mode bits Stack page select bit Sub-clock (XCIN-XCOUT): Oscillating Main clock (XIN-XOUT): Stopped Internal system clock: XCIN-XCOUT Set “division ratio – 1”. [ T1 = 159 (9F16), T2 = 99 (6316) ] Interrupt control register B (address 0616) Timer 123 mode register (address 2916) Timer 1 count: In progress Timer 1 count source: f(XCIN) / 2 Timer 2 count source: Timer 1’s underflow TOUT output disabled Timers 1, 2 write control: Written at the same time Timer 1 (address 2416) Timer 2 (address 2516) Timer 1 interrupt: Enabled Timer 2 interrupt: Disabled IREQB b0 b7 Interrupt request register B (address 0316) Timer 1 interrupt request Timer 2 interrupt request |
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