7641 datasheet(179/385 Pages) RENESAS

179 / 385 page

Rev.2.00

Aug 28, 2006

page 48 of 148

7641 Group

REJ09B0336-0200

APPLICATION

2.3 Serial I/O

SRDY output selected

STXD, SCLK output selected

Serial I/O interrupt : Disabled

ICONC

Interrupt control register C (Address : 0716)

SIOCON1

Serial I/O control register 1 (Address : 2B16)

LSB first

Synchronous clock : External clock

b7b0

STXD pin : CMOS output

SPI compatible mode

b7b0

Serial I/O control register 2 (Address : 2C16)

SIOCON2

SRXD input enabled

qSlave Unit

SCLK starting at “H”

Serial transfer starting afer a half cycle of SCLK

passed at falling edge of SRDY

No SRDY output

STXD, SCLK output selected

Serial I/O interrupt : Disabled

ICONC

Interrupt control register C (Address : 0716)

LSB first

Synchronous clock : Internal clock

b7b0

STXD pin : CMOS output

SPI compatible mode

b7b0

Serial I/O control register 2 (Address : 2C16)

SIOCON2

SRXD input enabled

SIOCON1

Serial I/O control register 1 (Address : 2B16)

b7b0

qMaster Unit

SCLK starting at “H”

Serial transfer starting afer a half cycle of SCLK

passed at falling edge of SRDY

Internal synchronous clock : Internal clock/32

Serial I/O internal clock :

Fig. 2.3.15 Registers setting for SPI compatible mode

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