7641 datasheet(202/385 Pages) RENESAS

202 / 385 page

Rev.2.00

Aug 28, 2006

page 71 of 148

7641 Group

REJ09B0336-0200

APPLICATION

2.4 UART

Fig. 2.4.19 Control procedure of receiver

• Judgment of completion of receiving

(Receive buffer full flag)

U2STS (Address : 3A16), bit2?

Read out a received data from U2TRB2

(Add. : 3D16), U2TRB1 (Add. : 3C16)

U2STS (Address : 3A16), bit6?

U2STS (Address : 3A16), bit2?

• Judgment of an error flag

U2STS (Address : 3A16), bit2?

U2CON (Address : 3B16)

010x10002

010x10102

Processing for error

• Reception of the first byte data

Receive buffer full flag is set

to “0” by reading data.

• Judgment of completion of

receiving

(Receive buffer full flag)

• Reception of the second byte data

Receive buffer full flag is set

to “0” by reading data.

• Judgment of an error flag

• Countermeasure for a bit slippage

RESET

(Address : 3916)

(Address : 3B16), bit3

(Address : 3816)

(Address : 3B16), bit6

(Address : 3E16)

Initialization

U2BRG

U2CON

U2MOD

U2CON

U2RTS

1916

100x00002

0016

q x: This bit is not used here. Set it to “0” or “1” arbitrarily.

ICONB

CLI

(Address : 0616)

xxxx0x0x2

•

φ as UART clock, Clock prescaling 1/1, 1 stop bit,

Parity checking disabled, 9-bit character length

• RTS function enabled

• No delay of RTS

• UART2 receive interrupt disabled

• UART2 summing error interrupt disabled

U2CON (Address : 3B16), bit1

• Reception starts.

Read out a received data from U2TRB2

(Add. : 3D16), U2TRB1 (Add. : 3C16)

U2CON (Address : 3B16), bit1

7641 Datasheet(PDF) 202 Page - Renesas Technology Corp

7641 Datasheet(HTML) 202 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL