7641 datasheet(198/385 Pages) RENESAS

198 / 385 page

Rev.2.00

Aug 28, 2006

page 67 of 148

7641 Group

REJ09B0336-0200

APPLICATION

2.4 UART

Figure 2.4.15 shows the registers setting for the transmitter, and Figures 2.4.16 and 2.4.17 show the

registers setting for the receiver.

Fig. 2.4.15 Registers setting for transmitter

U1MOD

U1BRG

1916

0 0 1

U1CON

U1STS

U1TRB1

U1TRB2

ICONA

Transmitting side

UART1 mode register (Address : 3016)

UART1 control register (Address : 3316)

UART clock :

UART clock prescaling :

φ/1

Character length : 9 bits

Parity checking disabled

Stop bit length : 1 stop bit

Transmit enabled

Receive disabled

UART address mode disabled

Transmit initializing

CTS function enabled

RTS function disabled

UART1 baud rate generator (Address : 3116)

UART1 transmit interrupt disabled

UART1 transmit/receive buffer register 2 (Address : 3516)

Interrupt control register A (Address : 0516)

high-order 1 bit of transmitting data set

low-order 8 bits of transmitting data set

UART1 status register (Address : 3216)

Transmit complete flag

Transmit buffer empty flag

Write data to high-order address first,

then to low-order address.

UART1 transmit/receive buffer register 1 (Address : 3416)

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