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7641 Datasheet(PDF) 199 Page - Renesas Technology Corp |
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7641 Datasheet(HTML) 199 Page - Renesas Technology Corp |
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199 / 385 page ![]() Rev.2.00 Aug 28, 2006 page 68 of 148 7641 Group REJ09B0336-0200 APPLICATION 2.4 UART U2MOD 0 0 0 0 0 0 1 U2BRG1916 0 1 0 0 U2CON 1 1 b0 b7 b0 b7 b0 b7 U2RTS 0 000 00 0 0 b0 b7 ICONB 0 0 b0 b7 Receiving side UART2 mode register (Address : 3816) UART clock : φ UART clock prescaling : φ/1 Character length : 9 bits Parity checking disabled Stop bit length : 1 stop bit UART2 control register (Address : 3B16) Transmit disabled Receive enabled UART address mode disabled Receive initializing CTS function disabled RTS function enabled UART2 RTS control register (Address : 3E16) No delay; Assertion immediately UART2 receive buffer full interrupt disabled Interrupt control register B (Address : 0616) UART2 summing error interrupt disabled UART2 baud rate generator (Address : 3916) Fig. 2.4.16 Registers setting for receiver (1) |
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