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SH7713 Datasheet(PDF) 443 Page - Renesas Technology Corp |
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SH7713 Datasheet(HTML) 443 Page - Renesas Technology Corp |
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443 / 904 page  Section 12 Bus State Controller (BSC) Rev.1.50 Aug. 30, 2006 Page 403 of 860 REJ09B0288-0150 Setting A2/3 BSZ [1:0] A2/3 ROW [1:0] A2/3 COL [1:0] 11 (32 bits) 00 (11 bits) 00 (8 bits) Output Pin of This LSI Row Address Output Column Address Output Synchronous DRAM Pin Function A1 A9 A1 A0 A8 A0 Unused Example of connected memory 64-Mbit product (512 kwords x 32 bits x 4 banks, column 8 bits product): 1 16-Mbit product (512 kwords x 16 bits x 2 banks, column 8 bits product): 2 Notes: 1. L/H is a bit used in the command specification; it is fixed at low or high according to the access mode. 2. Bank address specification 3. If the number of 16-Mbit SDRAM (512 kwords × 16 bits × 2 banks: pin with 8-bit column) is two, the bank address specification is not required. Therefore, the bank address should be not used. |
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