SH7713 datasheet(782/904 Pages) RENESAS

Part #	SH7713

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	904 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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Section 22 User Debugging Interface (H-UDI)

Rev.1.50 Aug. 30, 2006 Page 742 of 860

REJ09B0288-0150

22.4

Operation

22.4.1

TAP Controller

Figure 22.2 shows the internal states of the TAP controller. State transitions basically conform

with the JTAG standard.

Test-logic-reset

Capture-DR

Shift-DR

Exit1-DR

Pause-DR

Exit2-DR

Update-DR

Select-DR-scan

Run-test/idle

Capture-IR

Shift-IR

Exit1-IR

Pause-IR

Exit2-IR

Update-IR

Select-IR-scan

Figure 22.2 TAP Controller State Transitions

Note:

The transition condition is the TMS value at the rising edge of TCK. The TDI value is

sampled at the rising edge of TCK; shifting occurs at the falling edge of TCK. For details

on change timing of the TDO value, see section 22.4.3, TDO Output Timing. The TDO is

at high impedance, except with shift-DR and shift-IR states. During the change to

TRST =

0, there is a transition to test-logic-reset asynchronously with TCK.

SH7713 Datasheet(PDF) 782 Page - Renesas Technology Corp