SH7713 datasheet(286/904 Pages) RENESAS

286 / 904 page

Section 8 Interrupt Controller (INTC)

Rev.1.50 Aug. 30, 2006 Page 246 of 860

REJ09B0288-0150

8.4

The INTC has the following registers. For details on register addresses and register access size,

refer to section 23, List of Registers.

• Interrupt control register 0 (ICR0)

• Interrupt control register 1 (ICR1)

• Interrupt priority register A (IPRA)

• Interrupt priority register B (IPRB)

• Interrupt priority register C (IPRC)

• Interrupt priority register D (IPRD)

• Interrupt priority register E (IPRE)

• Interrupt priority register F (IPRF)

• Interrupt priority register G (IPRG)

• Interrupt priority register H (IPRH)

• Interrupt priority register I (IPRI)

• Interrupt request register 0 (IRR0)

• Interrupt request register 1 (IRR1)

• Interrupt request register 2 (IRR2)

• Interrupt request register 3 (IRR3)

• Interrupt request register 4 (IRR4)

• Interrupt request register 5 (IRR5)

• Interrupt request register 7 (IRR7)

• Interrupt request register 8 (IRR8)

8.4.1

Interrupt Priority Registers A to I (IPRA to IPRI)

IPRA to IPRI are 16-bit readable/writable registers in which priority levels from 0 to 15 are set for

on-chip peripheral module and IRQ interrupts. These registers are initialized to H'0000 by a

power-on reset or manual reset, but are not initialized in standby mode.

SH7713 Datasheet(PDF) 286 Page - Renesas Technology Corp