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SH7713 Datasheet(PDF) 290 Page - Renesas Technology Corp

Part # SH7713
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
PDF  904 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7713 Datasheet(HTML) 290 Page - Renesas Technology Corp

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Section 8 Interrupt Controller (INTC)
Rev.1.50 Aug. 30, 2006 Page 250 of 860
REJ09B0288-0150
Bit
Bit Name
Initial Value
R/W
Description
13
BLMSK
0
R/W
BL Bit Mask
When the BL bit in SR is set to 1, this bit
specifies whether an NMI interrupt is masked or
not.
0: When the BL bit is set to 1, an NMI interrupt is
masked
1: An NMI interrupt is accepted regardless of the
BL bit setting
12
0
R
Reserved
This bit is always read as 0. The write value
should always be 0.
IRQn Sense Select
These bits select whether interrupt request
signals corresponding to pins IRQ5 to IRQ0 are
detected by a rising edge, falling edge, high
level, or low level.
Bit 2n+1 Bit 2n
IRQn1S
IRQn0S
0
0
Interrupt request is
detected on falling
edge of IRQn input
0
1
Interrupt request is
detected on rising edge
of IRQn input
1
0
Interrupt request is
detected on low level of
IRQn input
1
1
Interrupt request is
detected on high level
of IRQn input
11
10
9
8
7
6
5
4
3
2
1
0
IRQ51S
IRQ50S
IRQ41S
IRQ40S
IRQ31S
IRQ30S
IRQ21S
IRQ20S
IRQ11S
IRQ10S
IRQ01S
IRQ00S
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Legend n=0 to 5



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