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SH7713 Datasheet(PDF) 294 Page - Renesas Technology Corp |
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SH7713 Datasheet(HTML) 294 Page - Renesas Technology Corp |
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294 / 904 page ![]() Section 8 Interrupt Controller (INTC) Rev.1.50 Aug. 30, 2006 Page 254 of 860 REJ09B0288-0150 8.4.7 Interrupt Request Register 3 (IRR3) IRR3 is an 8-bit register that indicates whether interrupt requests from the RTC are generated. This register is initialized to H'00 by a power-on reset or manual reset, but is not initialized in standby mode. Bit Bit Name Initial Value R/W Description 7 to 3 All 0 R Reserved These bits are always read as 0. The write value should always be 0. 2 CUIR 0 R CUI Interrupt Request Indicates whether the CUI (RTC) interrupt request is generated. 0: CUI interrupt request is not generated 1: CUI interrupt request is generated 1 PRIR 0 R PRI Interrupt Request Indicates whether the PRI (RTC) interrupt request is generated. 0: PRI interrupt request is not generated 1: PRI interrupt request is generated 0 ATIR 0 R ATI Interrupt Request Indicates whether the ATI (RTC) interrupt request is generated. 0: ATI interrupt request is not generated 1: ATI interrupt request is generated |
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