SH7713 datasheet(296/904 Pages) RENESAS

296 / 904 page

Section 8 Interrupt Controller (INTC)

Rev.1.50 Aug. 30, 2006 Page 256 of 860

REJ09B0288-0150

Bit

Bit Name

Initial Value

R/W

Description

RCMIR

RCMI Interrupt Request

Indicates whether the RCMI (REF) interrupt

request is generated.

0: RCMI interrupt request is not generated

1: RCMI interrupt request is generated

8.4.9

Interrupt Request Register 5 (IRR5)

IRR5 is an 8-bit register that indicates whether interrupt requests from the DMAC and E-DMAC

are generated. This register is initialized to H'00 by a power-on reset or manual reset, but is not

initialized in standby mode.

Bit

Bit Name

Initial Value

R/W

Description



Reserved

These bits are always read as 0. The write value

should always be 0.

DEI5R

DEI5 Interrupt Request

Indicates whether the DEI5 (DMAC) interrupt

request is generated.

0: DEI5 interrupt request is not generated

1: DEI5 interrupt request is generated

DEI4R

DEI4 Interrupt Request

Indicates whether the DEI4 (DMAC) interrupt

request is generated.

0: DEI4 interrupt request is not generated

1: DEI4 interrupt request is generated



Reserved

This bit is always read as 0. The write value

should always be 0.

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