SH7721 datasheet(414/1524 Pages) RENESAS

Part #	SH7721

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	1524 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

Logo

414 / 1524 page

Section 9

Bus State Controller (BSC)

Rev. 3.00 Jan. 18, 2008 Page 352 of 1458

REJ09B0033-0300

Table 9.13

Relationship between A2/3BSZ[1:0], A2/3ROW[1:0], A2/3COL[1:0], and

Address Multiplex Output (2)-2

Setting

A2/3

BSZ

[1:0]

A2/3

ROW

[1:0]

A2/3

COL

[1:0]

11 (32 bits)

01 (12 bits)

10 (10 bits)

Output Pin of

This LSI

Row Address

Output

Column Address

Output

Synchronous

DRAM Pin

Function

A17

A27

A17

A16

A26

A16

Unused

A15

A25*

A13 (BA1)

A14

A24*

A12 (BA0)

Specifies bank

A13

A23

A13

A11

Address

A12

A22

L/H*

A10/AP

Specifies

address/precharge

A11

A21

A11

A10

A20

A10

A19

A18

A17

A16

A15

A14

A13

A12

Address

A11

A10

Unused

Example of connected memory

512-Mbit product (4 Mwords x 32 bits x 4 banks, column 10 bits product): 1

256-Mbit product (4 Mwords x 16 bits x 4 banks, column 10 bits product): 2

Notes: 1. L/H is a bit used in the command specification; it is fixed at low or high according to the

access mode.

2. Bank address specification

SH7721 Datasheet(PDF) 414 Page - Renesas Technology Corp

SH7721 Datasheet(HTML) 414 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL