SH7721 datasheet(522/1524 Pages) RENESAS

522 / 1524 page

Section 11

Clock Pulse Generator (CPG)

Rev. 3.00 Jan. 18, 2008 Page 460 of 1458

REJ09B0033-0300

Mode

FRQCR

Value

PLL

Circuit 1

PLL

Circuit 2

Clock

Ratio*

(I:B:P)

Frequency Range of

Input Clock and

Crystal Resonator

Frequency Range of

CKIO Pin

1000

on (

×1)

OFF

1:1:1

33.34 MHz

1001

on (

×1)

OFF

1:1:1/2

33.34 MHz to 66.67 MHz

1003

on (

×1)

OFF

1:1:1/4

33.34 MHz to 66.67 MHz

1101

on (

×2)

OFF

2:1:1

33.34 MHz

1103

on (

×2)

OFF

2:1:1/2

33.34 MHz to 66.67 MHz

1111

on (

×2)

OFF

1:1:1

33.34 MHz

1113

on (

×2)

OFF

1:1:1/2

33.34 MHz to 66.67 MHz

1202

on (

×3)

OFF

3:1:1

33.34 MHz to 44.45 MHz

1204

on (

×3)

OFF

3:1:1/2

33.34 MHz to 44.45 MHz

1222

on (

×3)

OFF

1:1:1

33.34 MHz

1224

on (

×3)

OFF

1:1:1/2

33.34 MHz to 66.67 MHz

1303

on (

×4)

OFF

4:1:1

33.34 MHz

1313

on (

×4)

OFF

2:1:1

33.34 MHz

1333

on (

×4)

OFF

1:1:1

33.34 MHz

Notes: *

The input clock is 1.

Maximum frequency: I

φ = 133.34 MHz, Bφ (CKIO) = 66.67 MHz, Pφ = 33.34 MHz

1. Use the CKIO frequency within 33.34 MHz

≤ CKIO ≤ 66.67 MHz.

2. The input to divider 1 is the output of PLL circuit 1.

3. Use the internal clock frequency within 33.34 MHz

≤ Iφ ≤ 133.34 MHz.

The internal clock frequency is the product of the frequency of the CKIO pin, the

frequency multiplication ratio of PLL circuit 1 selected by the STC bit in FRQCR, and

the division ratio selected by the IFC bit in FRQCR.

Do not set the internal clock frequency lower than the CKIO pin frequency.

4. Use the peripheral clock frequency within 8.34 MHz

≤ Pφ ≤ 33.34 MHz.

The peripheral clock frequency is the product of the frequency of the CKIO pin, the

frequency multiplication ratio of PLL circuit 1 selected by the STC bit in FRQCR, and

the division ratio selected by the PFC bit in FRQCR.

Do not set the peripheral clock frequency higher than the frequency of the CKIO pin.

× 1, × 2, × 3, or × 4 can be used as the multiplication ratio of PLL circuit 1. × 1, × 1/2,

× 1/3, or × 1/4can be selected as the division ratio of an internal clock. × 1, × 1/2, × 1/3,

× 1/4, or

× 1/6 can be selected as the division ratio of a peripheral clock. Set the rate in FRQCR.

SH7721 Datasheet(PDF) 522 Page - Renesas Technology Corp

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