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SH7721 Datasheet(PDF) 526 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 526 Page - Renesas Technology Corp |
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526 / 1524 page ![]() Section 11 Clock Pulse Generator (CPG) Rev. 3.00 Jan. 18, 2008 Page 464 of 1458 REJ09B0033-0300 11.4.2 USBH/USBF Clock Control Register (UCLKCR) The USBH/USBF clock control register is an 8-bit readable/writable register. UCLKCR is initialized to H'60 by a power-on reset. Word-size access is used to write to this register. This writing should be performed with H'A5 in the upper byte and the write data in the lower byte. Bit Bit Name Initial Value R/W Description 7 6 5 USSCS2 USSCS1 USSCS0 0 1 1 R/W R/W R/W Source Clock Select These bits select the source clock. 000: Clock stopped 001: Setting prohibited 010: Setting prohibited 011: Initial value (To run the USBH/USB, however, change the setting to "110: EXTAL_USB" or "111: USB crystal resonator".) 100: Setting prohibited 101: Setting prohibited 110: EXTAL_USB 111: USB crystal resonator 4 USSTB 0 R/W Standby USB Crystal Specifies stop or operation of the USB crystal oscillator in standby mode. 0: USB crystal oscillator stops in standby mode when the STBXTL bit (bit 4) in the STBCR register is 0. 1: USB crystal oscillator continues operating in standby mode 3 to 0 All 0 R Reserved These bits are always read as 0. The write value should always be 0. |
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