SH7721 datasheet(565/1524 Pages) RENESAS

565 / 1524 page

Section 14 Timer Unit (TMU)

Rev. 3.00 Jan. 18, 2008 Page 503 of 1458

REJ09B0033-0300

14.2.2

Timer Control Registers (TCR)

TCR are 16-bit readable/writable registers that control the timer counters (TCNT) and interrupts.

TCR control the issuance of interrupts when the flag indicating timer counter (TCNT) underflow

has been set to 1, and also carry out counter clock selection.

TCR are initialized to H'0000 at a power-on reset or manual reset. They are retained in standby or

sleep mode.

Bit

Bit Name

Initial

Value

R/W

Description

15 to 9 —

All 0

Reserved

These bits are always read as 0. The write value should

always be 0.

UNF

R/(W)* Underflow Flag

Status flag that indicates occurrence of a TCNT

underflow.

0: TCNT has not underflowed

[Clearing condition]

0 is written to UNF

1: TCNT has underflowed

[Setting condition]

TCNT underflows

7, 6

—

All 0

Reserved

These bits are always read as 0. The write value should

always be 0.

UNIE

R/W

Underflow Interrupt Control

Controls enabling of interrupt generation when the status

flag (UNF) indicating TCNT underflow has been set to 1.

0: Interrupt due to UNF (TUNI) is disabled

1: Interrupt due to UNF (TUNI) is enabled

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