SH7721 datasheet(564/1524 Pages) RENESAS

Part #	SH7721

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	1524 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

Logo

564 / 1524 page

Section 14 Timer Unit (TMU)

Rev. 3.00 Jan. 18, 2008 Page 502 of 1458

REJ09B0033-0300

14.2.1

Timer Start Register (TSTR)

TSTR is an 8-bit readable/writable register that selects whether to operate or halt the timer

counters (TCNT).

TSTR is initialized to H'00 at a power-on reset, manual reset, or in module stop mode. It is

retained in sleep mode and standby mode.

Bit

Bit Name

Initial

Value

R/W

Description

7 to 3

—

All 0

Reserved

These bits are always read as 0. The write value should

always be 0.

STR2

R/W

Counter Start 2

Selects whether to operate or halt timer counter 2

(TCNT_2).

0: TCNT_2 count halted

1: TCNT_2 counts

STR1

R/W

Counter Start 1

Selects whether to operate or halt timer counter 1

(TCNT_1).

0: TCNT_1 count halted

1: TCNT_1 counts

STR0

R/W

Counter Start 0

Selects whether to operate or halt timer counter 0

(TCNT_0).

0: TCNT_0 count halted

1: TCNT_0 counts

SH7721 Datasheet(PDF) 564 Page - Renesas Technology Corp

SH7721 Datasheet(HTML) 564 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL