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SH7721 Datasheet(PDF) 562 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 562 Page - Renesas Technology Corp |
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562 / 1524 page ![]() Section 14 Timer Unit (TMU) Rev. 3.00 Jan. 18, 2008 Page 500 of 1458 REJ09B0033-0300 Figure 14.1 shows a block diagram of the TMU. TSTR: TCR: [Legend] Timer start register Timer control register TCNT: TCOR: Timer counter Timer constant register TMU_SUNI, TUNI0, TUNI1, and TUNI2: Interrupt requests Prescaler TSTR TCR_0 TCNT_0 TCOR_0 TCR_1 TCNT_1 TCOR_1 Counter controller P φ TUNI0 TMU_SUNI RTC output clock Bus interface Ch. 0 Interrupt controller Interrupt controller Interrupt controller Counter controller Counter controller TUNI1 TUNI2 TCR_2 TCNT_2 TCOR_2 TMU Ch. 1 Ch. 2 Clock controller Figure 14.1 Block Diagram of TMU |
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