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SH7721 Datasheet(PDF) 596 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 596 Page - Renesas Technology Corp |
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596 / 1524 page  Section 15 16-Bit Timer Pulse Unit (TPU) Rev. 3.00 Jan. 18, 2008 Page 534 of 1458 REJ09B0033-0300 15.4.3 Buffer Operation Buffer operation, enables TGRC and TGRD to be used as buffer registers. Table 15.6 shows the register combinations used in buffer operation. Table 15.6 Register Combinations in Buffer Operation Timer General Register Buffer Register TGRA TGRC TGRB TGRD When a compare match occurs, the value in the buffer register for the corresponding channel is transferred to the timer general register. For update timing from a buffer register, rewriting on compare match occurrence or on counter cleaning can be selected. This operation is illustrated in figure 15.8. Buffer register Timer general register TCNT Comparator Compare match signal Counter cleaning signal BFWT bit Figure 15.8 Compare Match Buffer Operation |
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