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SH7721 Datasheet(PDF) 612 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 612 Page - Renesas Technology Corp |
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612 / 1524 page ![]() Section 16 Compare Match Timer (CMT) Rev. 3.00 Jan. 18, 2008 Page 550 of 1458 REJ09B0033-0300 16.2.1 Compare Match Timer Start Register (CMSTR) CMSTR is a 16-bit register that selects whether the compare match timer counter (CMCNT) is operated or halted. Bit Bit Name Initial Value R/W Description 15 to 5 All 0 R Reserved These bits are always read as 0. The write value should always be 0. 4 3 2 1 0 STR4 STR3 STR2 STR1 STR0 0 0 0 0 0 R/W R/W R/W R/W R/W Count Start 4 to 0 Selects whether to operate or halt the compare match timer counter for each channel (CMCNT_4 to CMCNT_0). 0: CMCNTn count operation halted 1: CMCNTn count operation n: 4 to 0 (corresponds to each channel) |
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