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SH7721 Datasheet(PDF) 641 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 641 Page - Renesas Technology Corp |
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641 / 1524 page  Section 17 Realtime Clock (RTC) Rev. 3.00 Jan. 18, 2008 Page 579 of 1458 REJ09B0033-0300 17.3.18 RTC Control Register 3 (RCR3) When the ENB bit is set to 1, RCR3 performs a comparison with the RYRCNT. From among RSECAR/RMINAR/RHRAR/RWKAR/RDAYAR/RMONAR/RCR3, the counter and alarm register comparison is performed only on those with ENB bits set to 1, and if each of those coincide, an alarm flag of RCR1 is set to 1. The ENB bit in RYRAR is initialized by a power-on reset. Remaining fields of RCR3 are not initialized by a power-on reset or manual reset, or in standby mode. Bit Bit Name Initial Value R/W Description 7 ENB 0 R/W When this bit is set to 1, comparison of the year alarm register (RYRAR) and the year counter (RYRCNT) is performed. 6 to 0 All 0 R Reserved These bits are always read as 0. The write value should always be 0. |
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