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SH7721 Datasheet(PDF) 774 Page - Renesas Technology Corp

Part # SH7721
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
PDF  1524 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7721 Datasheet(HTML) 774 Page - Renesas Technology Corp

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Section 21
Serial I/O with FIFO (SIOF)
Rev. 3.00 Jan. 18, 2008 Page 712 of 1458
REJ09B0033-0300
(2)
Transmit/Receive Timing
The SIOFTxD transmit timing and SIOFRxD receive timing relative to the SIOFSCK can be set as
the sampling timing in the following two ways. The transmit/receive timing is set using the REDG
bit in SIMDR.
• Falling-edge sampling
• Rising-edge sampling
Figure 21.4 shows the transmit/receive timing.
SIOFSCK
SIOFSYNC
SIOFTxD
SIOFRxD
SIOFSCK
SIOFSYNC
SIOFTxD
SIOFRxD
(a) Falling-edge sampling
(a) Rising-edge sampling
Receive timing
Transmit timing
Receive timing
Transmit timing
Figure 21.4
SIOF Transmit/Receive Timing



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