SH7721 datasheet(873/1524 Pages) RENESAS

873 / 1524 page

Section 25

USB Function Controller (USBF)

Rev. 3.00 Jan. 18, 2008 Page 811 of 1458

REJ09B0033-0300

Bit

Bit Name

Initial Value

R/W Description

EP3 TS

R/W EP3 (Interrupt) Transmit Complete

[Setting condition]

When data to be transmitted to the host is written to

EP3, then data is normally transferred from the host to

the function, and an ACK handshake is returned.

[Clearing conditions]

• When reset

• When 0 is written to by CPU

VBUSF

R/W USB Disconnection Detection

The USBF_VBUS pin of this module is used for

detecting connection/disconnection.

[Setting condition]

When the function is connected to the USB bus or

disconnected from it.

[Clearing conditions]

• When reset

• When 0 is written to by CPU.

25.3.3

Interrupt Flag Register 2 (IFR2)

IFR2 is an interrupt flag register for SURSS, SURSF, CFDN, SOF, SETC, and SETI. When each

flag is set to 1 and an interrupt is enabled in the corresponding bit of IER2, an interrupt occurs as

specified by the corresponding bit in ISR2. Clearing is performed by writing 0 to the bit to be

cleared. Writing 1 is not valid and nothing is changed.

Bit

Bit Name

Initial Value

R/W Description

7, 6



All 0

Reserved

These bits are always read as 0. The write value

should always be 0.

SURSS

Suspend/Resume Status

Status bit indicating the state of the bus

0: Normal state

1: Suspend state

SH7721 Datasheet(PDF) 873 Page - Renesas Technology Corp

SH7721 Datasheet(HTML) 873 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL