SH7721 datasheet(874/1524 Pages) RENESAS

Part #	SH7721

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	1524 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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874 / 1524 page

Section 25

USB Function Controller (USBF)

Rev. 3.00 Jan. 18, 2008 Page 812 of 1458

REJ09B0033-0300

Bit

Bit Name

Initial Value

R/W Description

SURSF

R/W Suspend/Resume Detection

[Setting condition]

When the bus transits from the normal state to the

suspend state or from the suspend state to the normal

state.

[Clearing conditions]

• When reset

• When 0 is written to by CPU

CFDN

R/W End Point Information Load Complete

[Setting condition]

When the end point information written in EPIR is

completed to be set (loaded) in this controller.

Note:

This controller operates normally as USB after

the setting of the end point information is

completed.

[Clearing conditions]

• When reset

• When 0 is written to by CPU

SOF

R/W SOF Packet

[Setting condition]

When the valid SOF packet is detected.

[Clearing conditions]

• When reset

• When 0 is written to by CPU

SETC

R/W Set Configuration Command Detection

[Setting condition]

When the valid Set Configuration command is

detected.

[Clearing conditions]

• When reset

• When 0 is written to by CPU

SH7721 Datasheet(PDF) 874 Page - Renesas Technology Corp

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