SH7721 datasheet(1094/1524 Pages) RENESAS

1094 / 1524 page

Section 31

MultiMediaCard Interface (MMCIF)

Rev. 3.00 Jan. 18, 2008 Page 1032 of 1458

REJ09B0033-0300

Bit

Bit Name

Initial

Value

R/W

Description

—

Reserved

This bit is always read as 0. The write value should always

be 0.

TY6

R/W

Specifies the pre-defined multiblock transfer. Bits TY1 and

TY0 should be set to 01 or 10.

When the command which specifies this bit is used, the

transfer block size and the number of transfer blocks should

be specified in TBCR and TBNCR, respectively.

TY5

R/W

Specifies the multiblock transfer while the secure MMC is

used. Bits TY1 and TY0 should be set to 01 or 10.

When the command which specifies this bit is used, the

transfer block size and the number of transfer blocks should

be specified in TBCR and TBNCR, respectively.

TY4

R/W

This bit is set to 1 when the CMD12 command is issued. Bits

TY1 and TY0 should be set to 00.

TY3

R/W

Specifies the stream transfer. Bits TY1 and TY0 should be

set to 01 or 10. The stream transfer can be used only in

MMC mode.

The command sequence of the stream transfer specified by

this bit ends when it is stopped by the CMD12 command.

TY2

R/W

Specifies the open-ended multiblock transfer. Bits TY1 and

TY0 should be set to 01 or 10.

The command sequence of the stream transfer specified by

this bit ends when it is stopped by the CMD12 command.

TY1

TY0

R/W

Specify the existence and direction of transfer data.

00: A command without data transfer

01: A command with read data reception

10: A command with write data transmission

11: Setting prohibited

Table 31.2 summarizes the correspondence between the commands described in the

MultiMediaCard System Specification Version 3.1 and the settings of CMDTYR and RSPTYR.

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