SH7721 datasheet(179/1524 Pages) RENESAS

Part #	SH7721

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	1524 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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179 / 1524 page

Section 3 DSP Operating Unit

Rev. 3.00 Jan. 18, 2008 Page 117 of 1458

REJ09B0033-0300

Bits

Bit Name

Initial

Value

R/W

Function

3 to 1

All 0

R/W

DC Bit Status Selection

Designate the mode for selecting the operation result

status to be set in the DC bit

000: Carry/borrow mode

001: Negative value mode

010: Zero mode

011: Overflow mode

100: Signed greater mode

101: Signed greater than or equal to mode

110: Reserved (setting prohibited)

111: Reserved (setting prohibited)

R/W

DSP Status Bit

Sets the status of the operation result in the mode

designated by the CS bits

0: Designated mode status has not occurred

1: Designated mode status has occurred

Indicates the operation result by carry or borrow

regardless of the CS bit status after the PADDC or

PSUBC instruction has been executed.

The DSR is assigned to the system registers. For the DSR, the following load and store

instructions are supported.

STS DSR,Rn;

STS.L DSR,@-Rn;

LDS Rn,DSR;

LDS.L @Rn+,DSR;

If the DSR is read by the STS instruction, upper bits (bits 31 to 16) are all 0.

SH7721 Datasheet(PDF) 179 Page - Renesas Technology Corp