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SH7721 Datasheet(PDF) 180 Page - Renesas Technology Corp

Part # SH7721
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
PDF  1524 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7721 Datasheet(HTML) 180 Page - Renesas Technology Corp

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Section 3 DSP Operating Unit
Rev. 3.00 Jan. 18, 2008 Page 118 of 1458
REJ09B0033-0300
3.5.2
DSP Operation Instruction Set
DSP operation instructions are instructions for digital signal processing performed by the DSP
unit. These instructions have a 32-bit instruction code, and multiple instructions can be executed
in parallel. The instruction code is divided into a field A and field B; a parallel data transfer
instruction is specified in the field A, and a single or double data operation instruction in the field
B. Instructions can be specified independently, and are also executed independently.
B-field data operation instructions are of three kinds: double data operation instructions,
conditional single data operation instructions, and unconditional single data operation instructions.
The formats of the DSP operation instructions are shown in table 3.17. The respective operands
are selected independently from the DSP registers. The correspondence between DSP operation
instruction operands and registers is shown in table 3.18.
Table 3.17
DSP Operation Instruction Formats
Type
Instruction Formats
Double data operation instructions
ALUop. Sx, Sy, Du
MLTop. Se, Df, Dg
Conditional single data operation
instructions
DCT
ALUop. Sx, Sy, Dz
DCF
ALUop. Sx, Sy, Dz
DCT
ALUop. Sx, Dz
DCF
ALUop. Sx, Dz
DCT
ALUop. Sy, Dz
DCF
ALUop. Sy, Dz
Unconditional single data operation
instructions
ALUop. Sx, Sy, Dz
ALUop. Sx, Dz
ALUop. Sy, Dz
MLTop. Se, Sf, Dg



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